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i_iec.h

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00001 /*
00002  *  This program is free software; you can redistribute it and/or
00003  *  modify it under the terms of the GNU General Public License
00004  *  as published by the Free Software Foundation; either version
00005  *  2 of the License, or (at your option) any later version.
00006  *
00007  *  Copyright 2004 Spiro Trikaliotis
00008  *
00009  */
00010 
00020 #ifndef I_CBMIEC_H
00021 #define I_CBMIEC_H
00022 
00023 #include "iec.h"
00024 
00025 /* The port addresses (relative) of the parallel port */
00026 
00028 #define PARALLEL_DATA_OFFSET 0
00029 
00030 #define PARALLEL_STATUS_OFFSET 1
00031 
00032 #define PARALLEL_CONTROL_OFFSET 2
00033 
00034 #define PARALLEL_REGISTER_SPAN 3
00035 
00036 
00037 /* lpt output lines */
00038 /* this is correct for a XA1541/XM1541; a XE1541 has DATA and RESET exchanged! */
00039 
00040 #define PP_ATN_OUT    0x01 
00041 #define PP_CLK_OUT    0x02 
00042 #define PP_DATA_OUT   0x04 
00043 #define PP_RESET_OUT  0x08 
00044 
00045 /* additional LP control */
00046 #define PP_LP_IRQ     0x10 
00047 #define PP_LP_BIDIR   0x20 
00048 
00049 /* lpt input lines */
00050 #define PP_ATN_IN     0x10 
00051 #define PP_CLK_IN     0x20 
00052 #define PP_DATA_IN    0x40 
00053 #define PP_RESET_IN   0x80 
00054 
00055 
00056 #define PAR_PORT (Pdx->ParPortPortAddress + PARALLEL_DATA_OFFSET)
00057 
00059 #define IN_PORT  (Pdx->ParPortPortAddress + PARALLEL_STATUS_OFFSET)
00060 
00062 #define OUT_PORT (Pdx->ParPortPortAddress + PARALLEL_CONTROL_OFFSET)
00063 
00065 #define CBMIEC_SET(_set)              Pdx->IecOutBits|=(_set); WRITE_PORT_UCHAR(OUT_PORT,(UCHAR)(Pdx->IecOutEor ^ Pdx->IecOutBits))
00066 
00067 #define CBMIEC_RELEASE(_rel)          Pdx->IecOutBits&=~(_rel); WRITE_PORT_UCHAR(OUT_PORT,(UCHAR)(Pdx->IecOutEor ^ Pdx->IecOutBits))
00068 
00069 #define CBMIEC_SET_RELEASE(_set,_rel) Pdx->IecOutBits|=(_set); Pdx->IecOutBits&=~(_rel); \
00070                                       WRITE_PORT_UCHAR(OUT_PORT,(UCHAR)(Pdx->IecOutEor ^ Pdx->IecOutBits))
00071 
00073 #define CBMIEC_GET(_line)             ((READ_PORT_UCHAR(IN_PORT)&_line)==0?1:0)
00074 
00075 
00077 typedef
00078 struct IEC_TIMEOUTS
00079 {
00081     ULONG T_holdreset;
00083     ULONG T_afterreset;
00084 
00086     ULONG T_WaitForListener_Granu_T_H;
00087 
00089     ULONG T_1_RECV_WAIT_CLK_LOW_DATA_READY_GRANU;
00090 
00092     ULONG T_2_Times;
00093 
00095     ULONG T_2_RECV_WAIT_CLK_HIGH_T_NE;
00096 
00098     ULONG T_3_RECV_EOI_RECOGNIZED;
00099 
00101     ULONG T_4_Times;
00102 
00104     ULONG T_4_RECV_WAIT_CLK_HIGH_AFTER_EOI_GRANU;
00105 
00107     ULONG T_5_Times;
00108 
00110     ULONG T_5_RECV_BIT_WAIT_CLK_HIGH;
00111 
00113     ULONG T_6_Times;
00114 
00116     ULONG T_6_RECV_BIT_WAIT_CLK_LOW;
00117 
00119     ULONG T_7_RECV_INTER_BYTE_DELAY;
00120 
00122     ULONG T_8_IEC_WAIT_LONG_DELAY;
00123 
00125     ULONG T_8_IEC_WAIT_SHORT_DELAY;
00126     
00128     ULONG T_9_Times;
00129 
00131     ULONG T_9_SEND_WAIT_DEVICES_T_AT;
00132 
00134     ULONG T_10_SEND_BEFORE_1ST_BYTE;
00135 
00137     ULONG T_11_SEND_BEFORE_BYTE_DELAY;
00138 
00140     ULONG T_12_SEND_AFTER_BYTE_DELAY;
00141 
00143     ULONG T_13_SEND_TURN_AROUND_LISTENER_TALKER_T_TK;
00144     
00146     ULONG T_14_SEND_AT_END_DELAY;
00147 
00148     // sendbyte related:
00149 
00151     ULONG T_15_SEND_BEFORE_BIT_DELAY_T_S;
00152 
00154     ULONG T_16_SEND_BIT_TIME_T_V;
00155 
00157     ULONG T_17_Times;
00158 
00160     ULONG T_17_SEND_FRAME_HANDSHAKE_T_F;
00161 
00163     ULONG T_PARALLEL_BURST_READ_BYTE_HANDSHAKED;
00164 
00166     ULONG T_PARALLEL_BURST_WRITE_BYTE_HANDSHAKED;
00167 
00168 } IEC_TIMEOUTS;
00169 
00171 extern IEC_TIMEOUTS libiec_global_timeouts;
00172 
00173 #if DBG
00174 
00175 /* The functions DbgWp() and DbgRp() are used to intercept
00176  * NDIS_WRITE_PORT() and NDIS_READ_PORT() when debugging.
00177  */
00178 extern VOID
00179 DbgWp(IN PUCHAR Port, IN UCHAR Value);
00180 
00181 extern UCHAR
00182 DbgRp(IN PUCHAR Port);
00183 
00184 /* cbmiec_show_port() is used to show the value of the
00185  * parallel port lines if needed for debugging
00186  */
00187 extern VOID
00188 cbmiec_show_port(UCHAR *s);
00189 
00190 /*
00191  * If DBG is defined, we want to be able to monitor every
00192  * READ_PORT_UCHAR and WRITE_PORT_UCHAR, so we override them
00193  * here with our own functions:
00194  */
00195 
00196 #define READ_PORT_UCHAR(_x_)       DbgRp(_x_)
00197 #define WRITE_PORT_UCHAR(_x_, _y_) DbgWp(_x_, _y_)
00198 
00199 /*
00200  *  dump input lines
00201  */
00202 extern VOID
00203 cbmiec_show_state(IN PDEVICE_EXTENSION Pdx, IN UCHAR *Str);
00204 
00205 #else /* #if DBG */
00206 
00208     #define cbmiec_show_state(_x_, _y_)
00209 
00210 #endif /* #if DBG */
00211 
00212 extern VOID
00213 cbmiec_schedule_timeout(IN ULONG howlong); // howlong in us!
00214 
00215 extern VOID
00216 cbmiec_udelay(IN ULONG howlong); // howlong in ms!
00217 
00218 extern NTSTATUS
00219 cbmiec_i_raw_read(IN PDEVICE_EXTENSION Pdx, OUT UCHAR *buf, ULONG cnt, OUT ULONG *pReceived);
00220 
00221 extern NTSTATUS
00222 cbmiec_i_raw_write(PDEVICE_EXTENSION Pdx, const UCHAR *buf, ULONG cnt, ULONG *pSent, BOOLEAN atn, BOOLEAN talk);
00223 
00224 extern VOID
00225 cbmiec_block_irq(PDEVICE_EXTENSION Pdx);
00226 
00227 extern VOID
00228 cbmiec_release_irq(PDEVICE_EXTENSION Pdx);
00229 
00230 #ifdef USE_DPC
00231 
00232     extern VOID
00233     cbmiec_dpc(IN PKDPC Dpc, IN PDEVICE_OBJECT Fdo, IN PIRP Irp, IN PVOID Context);
00234 
00235 #endif // #ifdef USE_DPC
00236 
00237 #endif /* #ifndef I_CBMIEC_H */

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